Abstract: A system architecture of 6-channel 60 MHz high-speed data acquisition based on PCI bus was studied and implemented. The system could be used to implement data acquisition through 6 channels with acquisition parallel but transfering separately, and store large amount of data. General design strategy, theory of main parts of the card, circuit design, programming and circuit design of CPLD were presented. Some questions during the design of high speed data acquisition system, such as anti-jamming, were presented deeply.