Design of High-speed Data Acquisition System of Ultrasound Phased Array
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摘要: 提出了一种超声相控阵高速数据采集系统的设计方案，该方案基于ADC+FPGA+ARM架构，实现多路高速数据的采集传输。重点研究了ADC、FPGA接口设计。采用AD9272作为相控阵模拟前端，实施前端模拟信号预处理及多路高速数据并行采集；采用Spartan-6 XC6SLX150进行多路高速数据的实时传输转换，在FPGA内实现了32路600 M、DDR、串行LVDS数据高速接收恢复；最后通过上位机观测采集传输的超声相控阵回波信号。该设计充分利用当前高集成度芯片，为超声相控阵检测系统小型化的实现提供了参考。Abstract: This paper presents a design of high-speed data acquisition system of ultrasound phased array, which is based on the architecture of ADC+FPGA+ARM and is achieving the acquisition and transmission of multi-channel high-speed data. This paper focuses on the design of the ADC、FPGA interface. It takes AD9272 as the analog front end of phased array to preprocess the front analog signals and acquire multi-channel high-speed data, and uses Spartan-6 XC6SLX150 to realize the real-time transmission and conversion of multiple high-speed data. The system can achieve the recovery of 32-channel 600 M、DDR、serial LVDS data in the FPGA. Finally, a host computer is used to observe the acquired and transmitted echo signals of ultrasound phased array. This design makes full use of highly integrated chips, providing a reference for the miniaturization of the ultrasonic phased array inspection system.
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Keywords:
- Ultrasonic phased array /
- High-speed data acquisition /
- Multi-channel
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