Abstract: This paper presents a design of high-speed data acquisition system of ultrasound phased array, which is based on the architecture of ADC+FPGA+ARM and is achieving the acquisition and transmission of multi-channel high-speed data. This paper focuses on the design of the ADC、FPGA interface. It takes AD9272 as the analog front end of phased array to preprocess the front analog signals and acquire multi-channel high-speed data, and uses Spartan-6 XC6SLX150 to realize the real-time transmission and conversion of multiple high-speed data. The system can achieve the recovery of 32-channel 600 M、DDR、serial LVDS data in the FPGA. Finally, a host computer is used to observe the acquired and transmitted echo signals of ultrasound phased array. This design makes full use of highly integrated chips, providing a reference for the miniaturization of the ultrasonic phased array inspection system.